armviz

Annotated disassembler

Every register an instruction touches is marked and linked, so a register name in a disassembly leads straight to its definition and its role in the calling convention. The decoder covers the integer instruction set; anything it does not recognise is shown as its raw encoding rather than guessed at.

One 32-bit word per eight hex digits. Drop a binary here, or load one, to read it as little-endian words.

Branch targets are shown relative to this, since PC-relative offsets only mean something once the code has a position.

10 instructions · 10 decoded
read written not decoded
  1. 0x1000a9bf7bfdstpx29, x30, [sp, #-16]!
  2. 0x1004910003fdmovx29, sp
  3. 0x1008d10083ffsubsp, sp, #0x20
  4. 0x100cf841c3e1ldurx1, [sp, #28]
  5. 0x1010aa0103e0movx0, x1
  6. 0x1014d63f0000blrx0
  7. 0x1018910043e0addx0, sp, #0x10
  8. 0x101cf100041fcmpx0, #0x1
  9. 0x102054000140b.eq#0x1048
  10. 0x1024d65f03c0ret