armviz

X17

alias W17architectural number 17

IP1 (second intra-procedure-call scratch register)

X1764-bit view
X only
shared with W17
W1732-bit view
bits 31:0 of X17
write

Writing W17 does not simply deposit 32 bits. Bits 63:32 of X17 are reset to zero as a side effect, so a W write always clears the upper half. This is the reason W17 and X17 can never hold unrelated values at the same time.

Notes

Also the conventional register for a lazily resolved function address in a PLT stub.