armviz

DAIF

32-bitFlags

The four interrupt mask bits of PSTATE, gathered into one register so they can be read and written in a single instruction. A set bit means the corresponding exception is masked at the current level.

Field layout

—
9
8
7
6
—
byte 3
byte 2
byte 1
byte 0

Current value hover a field to locate it

B3
B2
B1
B0

Fields

BitsFieldBitsValueDescription
31:10—22Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise.
9D[9]1

Process state abort mask, covering data aborts from the current EL and lower.

0
Data aborts taken at this level
1
Data aborts masked
8A[8]1

SError interrupt mask. SError is the asynchronous error interrupt used for things like correctable memory errors.

0
SError taken at this level
1
SError masked
7I[7]1

IRQ mask. One bit covers both normal and virtual IRQ.

0
IRQ taken at this level
1
IRQ masked
6F[6]1

FIQ mask.

0
FIQ taken at this level
1
FIQ masked
5:0—6Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise.
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