ESR_EL3
64-bitTrapWhy the exception happened at EL3. The first register a secure-monitor handler reads.
Field layout
—
EC[31:26]31:26
25
ISS[24:0]24:0
byte 7
byte 6
byte 5
byte 4
byte 3
byte 2
byte 1
byte 0
Current value hover a field to locate it
B7
B6
B5
B4
B3
B2
B1
B0
Fields
| Bits | Field | Bits | Value | Description |
|---|---|---|---|---|
| 63:32 | — | 32 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 31:26 | EC[31:26] | 6 | 0x0 (0) | Exception class. Read this before trusting anything in ISS. |
| 25 | IL[25] | 1 | 0x0 | Instruction length. Set means the faulting instruction was a 32-bit AArch32 instruction, clear means AArch64. |
| 24:0 | ISS[24:0] | 25 | 0x0 (0) | Instruction-specific syndrome, interpreted according to EC. |