ID_AA64AFR0_EL1
64-bitIdentificationWhich architectural feature extensions are present. A bit here means the CPU implements an optional feature, and reading this is how code decides whether it may use one.
Field layout
—
31
27:26
24
23
21
20
19
17:16
15
13:12
9:8
7
6
4
3
1
0
byte 7
byte 6
byte 5
byte 4
byte 3
byte 2
byte 1
byte 0
Current value hover a field to locate it
B7
B6
B5
B4
B3
B2
B1
B0
Fields
| Bits | Field | Bits | Value | Description |
|---|---|---|---|---|
| 63:32 | — | 32 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 31 | ECV[31:31] | 1 | 0x0 | Enhanced counter virtualization. |
| 30:28 | — | 3 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 27:26 | MTE[27:26] | 2 | 0x0 | Memory tagging extension. |
| 25 | — | 1 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 24 | RPRES[24:24] | 1 | 0x0 | Register write suppression. |
| 23 | BTI[23:23] | 1 | 0x0 | Branch target identification. |
| 22 | — | 1 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 21 | SPE[21:21] | 1 | 0x0 | Spectre-safe heap allocation. |
| 20 | CSV2[20:20] | 1 | 0x0 | Control flow protection. |
| 19 | AFP[19:19] | 1 | 0x0 | Authenticated indirect branches. |
| 18 | — | 1 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 17:16 | PAuth[17:16] | 2 | 0x0 | Pointer authentication. |
| 15 | EBF16[15:15] | 1 | 0x0 | BFloat16 support. |
| 14 | — | 1 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 13:12 | TWF1[13:12] | 2 | 0x0 | TST64 instruction. |
| 11:10 | — | 2 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 9:8 | TWF0[9:8] | 2 | 0x0 | TST32 instruction. |
| 7 | CSSC[7:7] | 1 | 0x0 | Common short sequence compression. |
| 6 | LPA[6:6] | 1 | 0x0 | Larger page sizes: 16 KiB and 64 KiB granules. This bit is why a granule other than 4 KiB needs a v8.2 CPU. |
| 5 | — | 1 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 4 | RAND[4:4] | 1 | 0x0 | NOP and hint space behaves as RES0. |
| 3 | UAO[3:3] | 1 | 0x0 | Imprecise abort at EL0 to EL2. |
| 2 | — | 1 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 1 | DIT[1:1] | 1 | 0x0 | Data cache clean to the point of deep persistence. |
| 0 | FG[0:0] | 1 | 0x0 | Flagm. |