ID_AA64ISAR0_EL1
64-bitIdentificationWhich instruction-set extensions are present: atomics, CRC, the cryptographic instructions, the memory-tagging instructions. A program that checks this can use an extension when the CPU has it and fall back when it does not.
Field layout
—
24
23
20
—
13:12
9
8
5
4
3
2
1:0
byte 7
byte 6
byte 5
byte 4
byte 3
byte 2
byte 1
byte 0
Current value hover a field to locate it
B7
B6
B5
B4
B3
B2
B1
B0
Fields
| Bits | Field | Bits | Value | Description |
|---|---|---|---|---|
| 63:25 | — | 39 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 24 | MTE[24:24] | 1 | 0x0 | Memory tagging instructions. |
| 23 | FEAT_LSB[23:23] | 1 | 0x0 | FEAT_LSB, the load/store group. |
| 22:21 | — | 2 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 20 | DGH[20:20] | 1 | 0x0 | Data gathering hint. |
| 19:14 | — | 6 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 13:12 | LRCPC[13:12] | 2 | 0x0 | Load-acquire and store-release, RCpc. |
| 11:10 | — | 2 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 9 | ASIMD[9:9] | 1 | 0x0 | Advanced SIMD. |
| 8 | FP[8:8] | 1 | 0x0 | Floating-point. |
| 7:6 | — | 2 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 5 | Atomic[5:5] | 1 | 0x0 | Atomic and acquire-release instructions. |
| 4 | CRC32[4:4] | 1 | 0x0 | CRC32. |
| 3 | SHA2[3:3] | 1 | 0x0 | SHA256. |
| 2 | SHA1[2:2] | 1 | 0x0 | SHA1. |
| 1:0 | AES[1:0] | 2 | 0x0 | AES and PMULL. |