ID_AA64ISAR1_EL1
64-bitIdentificationFurther instruction-set extensions, including the memory-ordering instructions that pair with RCpc.
Field layout
—
20
17
16
15
14
9
8
6
5
4
byte 7
byte 6
byte 5
byte 4
byte 3
byte 2
byte 1
byte 0
Current value hover a field to locate it
B7
B6
B5
B4
B3
B2
B1
B0
Fields
| Bits | Field | Bits | Value | Description |
|---|---|---|---|---|
| 63:21 | — | 43 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 20 | CSV3[20:20] | 1 | 0x0 | Control flow protection. |
| 19:18 | — | 2 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 17 | SSBCR[17:17] | 1 | 0x0 | Reserved. |
| 16 | SSBS[16:16] | 1 | 0x0 | Speculation barrier instruction. |
| 15 | LRCPC2[15:15] | 1 | 0x0 | Further load-acquire and store-release. |
| 14 | RCPC_IMMO[14:14] | 1 | 0x0 | Memory ordering with immediate barriers. |
| 13:10 | — | 4 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 9 | PACG[9:9] | 1 | 0x0 | Pointer authentication, generic. |
| 8 | PACA[8:8] | 1 | 0x0 | Pointer authentication, address. |
| 7 | — | 1 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 6 | SB[6:6] | 1 | 0x0 | Sign and zero extend, with hints. |
| 5 | FlagM[5:5] | 1 | 0x0 | Flag manipulation instructions. |
| 4 | BExtF16[4:4] | 1 | 0x0 | BFloat16 extension. |
| 3:0 | — | 4 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. |