ID_AA64MMFR1_EL1
64-bitIdentificationFurther memory-management features, including the tagged-address and address-translation-service extensions.
Field layout
—
23
22:20
19
18
17
16
15:14
13
12
11:10
9:8
7:5
4
3
2
1
0
byte 7
byte 6
byte 5
byte 4
byte 3
byte 2
byte 1
byte 0
Current value hover a field to locate it
B7
B6
B5
B4
B3
B2
B1
B0
Fields
| Bits | Field | Bits | Value | Description |
|---|---|---|---|---|
| 63:24 | — | 40 | Not assigned to a documented field. Values written here are reserved and should be treated as read-as-zero unless the architecture says otherwise. | |
| 23 | SED[23:23] | 1 | 0x0 | Prefetch faults. |
| 22:20 | LBR[22:20] | 3 | 0x0 | Link buffer register. |
| 19 | ECV[19:19] | 1 | 0x0 | Enhanced counter virtualization. |
| 18 | TWED[18:18] | 1 | 0x0 | TLB write-down. |
| 17 | TDS[17:17] | 1 | 0x0 | TLB invalidate by VA, EL0 to EL3. |
| 16 | TID[16:16] | 1 | 0x0 | TLB invalidate by TAG. |
| 15:14 | FRCT[15:14] | 2 | 0x0 | Flag register clearing on context switch. |
| 13 | ATP[13:13] | 1 | 0x0 | Address translation and privilege. |
| 12 | IWP[12:12] | 1 | 0x0 | Instruction writeback by VA to PoU. |
| 11:10 | DCPoDP[11:10] | 2 | 0x0 | Data cache clean to the point of deep persistence. |
| 9:8 | DCPoP[9:8] | 2 | 0x0 | Data cache clean to the point of persistence. |
| 7:5 | HAFDBS[7:5] | 3 | 0x0 | Hierarchical AF flag disable. |
| 4 | TS[4:4] | 1 | 0x0 | Address translation service. |
| 3 | AH[3:3] | 1 | 0x0 | Authentication tags. |
| 2 | NG4K[2:2] | 1 | 0x0 | 4K translation granule is supported. |
| 1 | LVA[1:1] | 1 | 0x0 | 64K translation granule is supported. |
| 0 | BPS[0:0] | 1 | 0x0 | Breakpoint instructions. |